Designing Scalable Wireless Application-specific Processors

This paper presents a structured way of designing and exploring scalable, wireless applicationspecific processors (SWAPs). Current designs for wireless systems have a huge time gap between the development of algorithms for new standards and their hardware implementation. Architectures designed using standard hardware-software co-design frameworks have such a long design time that by the end of the design cycle, the algorithms have already moved to the next wireless standard, out-dating the hardware design. SWAPs are programmable architectures that dynamically scale their resources to meet performance/power demands. Since the algorithms are implemented in software, wireless systems can be easily upgraded to newer standards, independent of the architecture implementation (but limited by the processing power of the current architecture). Limited versions of newer standards can now be implemented immediately. Simultaneously, a structured architecture design exploration methodology is used to explore programmable architectures for newer standards that provide performance-flexibility tradeoffs providing a wide range of programmable solutions with performance between DSPs and custom ASICs. This paper presents the designs steps and outlines new directions for architecture simulators, design tools and compiler research to support this design methodology. A real-time 3G base-station system design supporting 32 users at 128 Kbps each is presented that has been designed using this methodology that can dynamically scale its resources depending on the load demands and can also work as a 2G base-station.